This summary covers how the semiconductor industry's half-century focus on 'making things smaller' has hit its limits, ushering in a new era where the 'bridges' connecting chips and the 'foundations' supporting them become paramount. It explains how transparent glass is emerging as a new solution at the center of this shift, the future glass could bring, and the challenges that must be overcome.

1. The End of Making Things Smaller

For 50 years, humanity focused on shrinking semiconductors -- down to 10nm, 5nm, even 3nm. But physics ultimately declared: "You can't make them any smaller." This shifted thinking: "If we can't make individual units smaller, what about combining multiple units into something bigger?" The game's rules changed completely. Now the focus is not on microscopic internal circuits but on the 'bridges' between chips and the 'foundations' supporting them. The nanometer war is over; the micrometer war has begun -- with transparent glass at its center.

2. Chip Size Limits and Yield Problems

AI models keep growing, but there's an insurmountable ceiling (reticle limit) of about 858mm² for patterning. NVIDIA's GH100 die at 814mm² is already near the limit. Larger chips also face catastrophic yield problems -- a single defect ruins the entire chip, and survival rates plummet as size increases. Single monolithic chips are no longer the answer.

3. The Chiplet Era: Building Like LEGO

Instead of one massive chip, the industry now divides it into smaller chiplets manufactured separately and reassembled. This improves yields, reduces costs, avoids reticle limits, and allows mixing process nodes (e.g., 3nm for compute cores, 6nm for I/O). NVIDIA's Blackwell combines two near-limit dies; Intel's Ponte Vecchio assembles 47 chiplets. But splitting chips means internal communication must now travel externally -- and if inter-chiplet connections aren't as fast as internal wiring, there's no point in splitting.

4. The Role of Substrates and CoWoS

The chiplet structure resembles a bacon egg McMuffin without a top lid: the substrate (English muffin) supports everything; the chips (bacon) perform computation; and the interposer (egg) connects chips at ultra-high speeds. This is CoWoS: Chip-on-Wafer-on-Substrate. The critical question: what material for the egg and muffin?

5. Organic Substrates' Limits in the AI Era

Today's dominant organic substrates (resin and fiberglass layers) have served for 25 years. But AI shattered the calm. They fail two critical tests: thermal expansion (organic substrates expand 6-7x more than silicon, causing warping and solder joint cracking at AI chip scales) and signal loss (at the ultra-high frequencies AI chips demand, signals become unrecognizably blurred through organic substrates).

6. Silicon Interposers: The Best Bridge, the Biggest Bottleneck

TSMC's 2012 solution: use silicon itself as the interposer. Silicon interposers eliminated thermal mismatch and enabled ultra-fine wiring. Without them, today's AI chips wouldn't exist. But silicon interposers are made on semiconductor wafers, competing with chip fabrication for cleanroom capacity and production lines -- creating a massive bottleneck. A single large silicon interposer costs over $100 and can comprise half the total packaging cost.

7. Enter Glass: Two Paths

"Glass substrate" encompasses two distinct approaches:

1. Path 1: Replace the interposer with glass -- using display industry's large-area glass processing equipment to free up chip fabrication capacity. Samsung targets this for 2028.
2. Path 2: Replace the substrate itself with glass -- fundamentally breaking through organic substrate performance limits. Intel has invested over $1 billion in this path.

8. Glass's Overwhelming Advantages

Glass excels exactly where organic substrates fail:

1. Thermal expansion: Glass can be tuned to ~3 ppm/C, matching silicon's rate -- the most fundamental advantage, enabling package sizes impossible with organic substrates.
2. Signal loss: Glass signal loss can be 10x lower than organic substrates, breaking the vicious cycle of signal degradation, excessive power consumption, and heat generation.
3. Ultra-smooth surface: Enables hybrid bonding (copper-to-copper direct bonding without solder), fitting tens of times more connections in the same area -- impossible on organic substrates.
4. Transparency: Light can pass through glass, enabling optical waveguides embedded directly inside the substrate -- extending optical interconnects from on-chip to within the substrate itself.

9. Glass's Challenges: Three Mountains to Climb

Glass breaks. Micro-cracks from cutting, drilling, and handling can propagate fatally during thousands of thermal cycles. Long-term reliability data is still insufficient.

Thermal conductivity is two orders of magnitude lower than silicon (1 W/m-K vs. 130-150 W/m-K). However, if data flows as light through embedded waveguides, signals through the substrate generate almost no heat, making low thermal conductivity less critical.

Power delivery noise: Glass's very property of not absorbing signals means power supply noise reverberates instead of being dampened -- like a cough echoing in an empty concert hall.

Reliability, heat dissipation, and power noise -- three mountains that must be crossed before glass reaches mass production lines.

10. Conclusion: The Future of the Substrate War

The blade that once split transistors has dulled. In its place, the needle and thread stitching chips together grow ever sharper. Substrates are no longer simple plastic pedestals -- they have become the second semiconductor, a massive circuit determining entire system performance limits. By 2028, glass will begin taking its place at the heart of cutting-edge AI accelerators. Beyond that awaits a world where light flows through glass and electrical signals convert to optical signals traveling between chips.